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 HAT1110R
Silicon P Channel Power MOS FET Power Switching
REJ03G0416-0200 Rev.2.00 Oct.07.2004
Features
* Capable of -4.5 V gate drive * Low drive current * High density mounting
Outline
SOP-8
78 DD 56 DD 5 76
2 G
4 G
8
3 12 S1 S3
4
1, 3 Source 2, 4 Gate 5, 6, 7, 8 Drain
MOS1
MOS2
Absolute Maximum Ratings
(Ta = 25C)
Item Symbol Ratings Drain to source voltage VDSS -80 Gate to source voltage VGSS 20 Drain current ID -1 Note1 Drain peak current ID(pulse) -6 Reverse drain current IDR -1 Note2 Channel dissipation Pch 1.2 Channel dissipation Pch Note3 1.8 Channel temperature Tch 150 Storage temperature Tstg -55 to +150 Notes: 1. PW 10 s, duty cycle 1 % 2. 1 Drive operation; When using the glass epoxy board (FR4 40 x 40 x 1.6 mm), PW 10 s 3. 2 Drive operation; When using the glass epoxy board (FR4 40 x 40 x 1.6 mm), PW 10 s Unit V V A A A W W C C
Rev.2.00, Oct.07.2004, page 1 of 7
HAT1110R
Electrical Characteristics
(Ta = 25C)
Item Drain to source breakdown voltage Gate to source breakdown voltage Gate to source leak current Zero gate voltage drain current Gate to source cutoff voltage Static drain to source on state resistance Forward transfer admittance Input capacitance Output capacitance Reverse transfer capacitance Total gate charge Gate to source charge Gate to drain charge Turn-on delay time Rise time Turn-off delay time Fall time Body-drain diode forward voltage Body-drain diode reverse recovery time Notes: 4. Pulse test Symbol V(BR)DSS V(BR)GSS IGSS IDSS VGS(off) RDS(on) RDS(on) |yfs| Ciss Coss Crss Qg Qgs Qgd td(on) tr td(off) tf VDF trr Min -80 20 -- -- -1.0 -- -- 0.4 -- -- -- -- -- -- -- -- -- -- -- -- Typ -- -- -- -- -- 0.8 1.02 0.8 170 24 16 3.6 0.3 0.7 14 12 25 5.5 -0.86 21 Max -- -- 10 -1 -2.5 1.05 1.38 -- -- -- -- -- -- -- -- -- -- -- -1.12 -- Unit V V A A V S pF pF pF nC nC nC ns ns ns ns V ns Test Conditions ID = -10 mA, VGS = 0 IG = 100 A, VDS = 0 VGS = 16 V, VDS = 0 VDS = -80 V, VGS = 0 VDS = -10 V, I D = -1mA ID = -0.5 A, VGS = -10 V Note4 ID = -0.5 A, VGS = - 4.5 V Note4 ID = -0.5 A, VDS = -10 V Note4 VDS = -10 V VGS = 0 f = 1MHz VDD = -25 V VGS = -10 V ID = -1.0 A VGS = -10 V, ID = -0.5 A VDD -30 V RL = 60 Rg = 4.7 IF = -1.0 A, VGS = 0 Note4 IF = -1.0 A, VGS = 0 diF/ dt = 100 A/s
Rev.2.00, Oct.07.2007, page 2 of 7
HAT1110R
Main Characteristics
Power vs. Temperature Derating 4.0
Pch (W)
Maximum Safe Operation Area 10
10
10 0
ID (A)
Test condition. When using the glass epoxy board. (FR4 40 x 40 x 1.6 mm), (PW 10 s)
s
3.0
1
1
DC Op er
PW
m
s
s
=
10
Channel Dissipation
Drain Current
m
2.0
2 Dr ive Op
0.1
Operation in this area is 0.01 limited by RDS(on)
ati
s(
on
1s
ho
(P
t)
W
1.0
1D
rive
er
1 Not 0 se 5 )
Op
at
era
ion
tion
Ta = 25C 0.001 1 shot Pulse
0
50
100
150 Ta (C)
200
0.1
1
10
100
Ambient Temperature
Drain to Source Voltage VDS (V) Note 5 : When using the glass epoxy board (FR4 40x40x1.6 mm) Typical Transfer Characteristics -2.0 Tc = -25C
ID (A)
Typical Output Characteristics -2.5 -10 V -5 V -2.0
ID (A)
-4 V
25C 75C -1.0
-1.5
-3.5 V
Drain Current
-1.0
VGS = -3 V
-0.5 Pulse Test 0 -5 Drain to Source Voltage VDS -10 (V)
Drain Current
VDS = -10 V Pulse Test 0 -1.0 -2.0 -3.0 -4.0 Gate to Source Voltage VGS -5.0 (V)
-5
Drain to Source Voltage VDS(on) (V)
Pulse Test -4
-3
Static Drain to Source on State Resistance RDS(on) (m)
Drain to Source Saturation Voltage vs Gate to Source Voltage
Static Drain to Source on State Resistance vs. Drain Current 10 Pulse Test
VGS = -4.5 V 1 -10 V
-2 -1 ID = -1 A -0.5 A 0 -4 -8 -12 Gate to Source Voltage -16 -20 VGS (V)
0 0.1
1 Drain Current
10 ID (A)
Rev.2.00, Oct.07.2007, page 3 of 7
HAT1110R
Static Drain to Source on State Resistance vs. Temperature 3.0 Pulse Test 2.5 -1 A 2.0 ID = -0.2 A, -0.5 A 1.5 VGS = -4.5 V 1.0 -0.2 A, -0.5 A 0.5 0 -25 -10 V 0 25 50 75 100 125 150 Case Temperature Tc (C) -1 A Forward Transfer Admittance vs. Drain Current
Static Drain to Source on State Resistance RDS(on) ()
Forward Transfer Admittance |yfs| (S)
10 5 2 1 0.5 0.2 0.1 0.05 0.02
Tc = -25C
25C 75C VDS = -10 V Pulse Test -1 -3 -10 ID (A)
0.01 -0.01 -0.03 -0.1 -0.3 Drain Current
Body-Drain Diode Reverse Recovery Time Reverse Recovery Time trr (ns) 100 50 Capacitance C (pF)
200 100 50 20 10 5 2 1 1000 500
Typical Capacitance vs. Drain to Source Voltage VGS = 0 f = 1 MHz Ciss
20 10 5 2 1 -0.1 di / dt = -100 A / s VGS = 0, Ta = 25C -0.3 -1 -3 -10 Reverse Drain Current IDR (A) Dynamic Input Characteristics
Coss Crss
0
-10 -20 -30 -40 -50 Drain to Source Voltage VDS (V) Switching Characteristics
VDS (V)
0 VDD = -50 V -25 V -10 V
0 (V) ID = -1 A -4
100 50 Switching Time t (ns) td(off) 20 10 5 2 1 -0.1 td(on) tr tf VGS = -10 V, VDS = -30 V Rg = 4.7 , duty 1 % -1 Drain Current -10 ID (A)
Drain to Source Voltage
-40 VDS VDD = -50 V -25 V -10 V 2 4 Gate Charge 6 8 Qg (nC) VGS
-8
-60
-12
-80
-16
-100 0
-20 10
Rev.2.00, Oct.07.2007, page 4 of 7
Gate to Source Voltage
VGS
-20
HAT1110R
Reverse Drain Current vs. Source to Drain Voltage -2.5
Reverse Drain Current IDR (A)
Pulse Test -2.0
-1.5 -1.0 -10 V -5 V -0.5 VGS = 0V, 5 V
0
-0.4 -0.8 -1.2 Source to Drain Voltage
-1.6 -2.0 VSD (V)
Normalized Transient Thermal Impedance s (t)
Normalized Transient Thermal Impedance vs. Pulse Width (1 Drive Operation)
10
1
D=1 0.5
0.2
0.1
0.1
0.05
0.02
ch - f(t) = s (t) x ch - f ch - f = 180C/W, Ta = 25C When using the glass epoxy board (FR4 40x40x1.6 mm)
pu lse
PDM PW T
0.01
0.01
1s
t ho
D=
PW T
0.001 10
100
1m
10 m
100 m
1
10
100
1000
10000
Pulse Width PW (S) Normalized Transient Thermal Impedance vs. Pulse Width (2 Drive Operation)
Normalized Transient Thermal Impedance s (t)
10
1
D=1 0.5
0.2
0.1
0.1
0.05
0.02
ch - f(t) = s (t) x ch - f ch - f = 230C/W, Ta = 25C When using the glass epoxy board (FR4 40x40x1.6 mm)
pu lse
PDM PW T
0.01
0.01
1s
t ho
D=
PW T
0.001 10
100
1m
10 m
100 m 1 10 Pulse Width PW (S)
100
1000
10000
Rev.2.00, Oct.07.2007, page 5 of 7
HAT1110R
Switching Time Test Circuit Vin Monitor Rg D.U.T. RL 90% Vin -10 V V DD = -30 V Vout td(on) 90% 10% tr td(off) 90% 10% tf Vout Monitor Vin 10% Switching Time Waveform
Rev.2.00, Oct.07.2007, page 6 of 7
HAT1110R
Package Dimensions
As of January, 2003
Unit: mm
4.90 5.3 Max 5 8
1
4
3.95
*0.22 0.03 0.20 0.03
1.75 Max
0.75 Max
6.10 - 0.30
+ 0.10
1.08 0 - 8
+ 0.67
0.14 - 0.04
+ 0.11
1.27
0.60 - 0.20
*0.42 0.08 0.40 0.06
0.15 0.25 M
*Dimension including the plating thickness Base material dimension Package Code JEDEC JEITA Mass (reference value) FP-8DA Conforms -- 0.085 g
Ordering Information
Part Name HAT1110R-EL-E Quantity 2500 pcs Taping Shipping Container
Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product.
Rev.2.00, Oct.07.2007, page 7 of 7
Sales Strategic Planning Div.
Keep safety first in your circuit designs!
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein.
RENESAS SALES OFFICES
Refer to "http://www.renesas.com/en/network" for the latest and detailed information. Renesas Technology America, Inc. 450 Holger Way, San Jose, CA 95134-1368, U.S.A Tel: <1> (408) 382-7500, Fax: <1> (408) 382-7501 Renesas Technology Europe Limited Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K. Tel: <44> (1628) 585-100, Fax: <44> (1628) 585-900 Renesas Technology Hong Kong Ltd. 7th Floor, North Tower, World Finance Centre, Harbour City, 1 Canton Road, Tsimshatsui, Kowloon, Hong Kong Tel: <852> 2265-6688, Fax: <852> 2730-6071 Renesas Technology Taiwan Co., Ltd. 10th Floor, No.99, Fushing North Road, Taipei, Taiwan Tel: <886> (2) 2715-2888, Fax: <886> (2) 2713-2999 Renesas Technology (Shanghai) Co., Ltd. Unit2607 Ruijing Building, No.205 Maoming Road (S), Shanghai 200020, China Tel: <86> (21) 6472-1001, Fax: <86> (21) 6415-2952 Renesas Technology Singapore Pte. Ltd. 1 Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632 Tel: <65> 6213-0200, Fax: <65> 6278-8001
http://www.renesas.com
(c) 2004. Renesas Technology Corp., All rights reserved. Printed in Japan.
Colophon .2.0


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